allows for extraction of parasitic capacitances with high degree of accuracy.
The supported input formats include GDS, OASIS or OpenAccess for layout, and CDL, SPICE, or VERILOG
for schematic netlist.
In PowerDRC/LVS one and the same engine is used to run DRC, LVS, and RCX
, so to run parasitic extraction you may use either a dedicated rule deck or an extraction rule deck with RCX rules.
PowerRCX results correlate with proven in silicon on the following processes:
- IHP SG13S 130nm
- IHP SGB25V 250nm
- TSMC CL018 and 152G 180nm (with shrink 0.84)